mirror of
https://github.com/saymrwulf/onnxruntime.git
synced 2026-07-26 19:52:38 +00:00
DirectML EP remove stale code for int64 via int32 double strides (#9959)
This commit is contained in:
Dwayne Robinson
GitHub
parent
1f5b073508
commit
0f5e82c294
21 changed files with 111 additions and 391 deletions
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@ -108,24 +108,6 @@ namespace Windows::AI::MachineLearning::Adapter
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std::vector<uint32_t> requiredConstantCpuInputs;
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std::optional<GraphNodeFactoryRegistration> graphNodeFactoryRegistration;
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KernelSupportQuery supportQuery;
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// Many ONNX operators use 64-bit tensors, but most DML operators only support
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// 32-bit indices. This flag indicates to the graph whether it's okay to compute
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// the result using 32-bit tensors (ignoring the upper bits) via doubled strides.
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bool supportedWith64BitTensorsVia32BitStrides = false;
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// When true, the input to the current operator may come from any execution
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// provider. Otherwise it must have come from another DML node to assume it's safe
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// to use 64-bit to 32-bit striding.
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bool supportedWith64BitTensorsVia32BitStridesFromAnyEp = false;
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// Operator supports true 64-bit tensors directly, no strides needed.
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// So fallback to strided 32-bit only occurs when the device lacks 64-bit support.
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bool prefer64BitTensorsDirectly = false;
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// The operator supports emulation for uint64/int64 even if the hardware doesn't
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// support native uint64/int64 data types.
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bool support64BitTensorsViaEmulation = false;
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};
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using InternalRegistrationInfoMap = std::unordered_map<onnxruntime::KernelDef*, std::shared_ptr<InternalRegistrationInfo>>;
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@ -342,10 +342,6 @@ HRESULT STDMETHODCALLTYPE AbiCustomRegistry::RegisterOperatorKernel(
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bool canAliasFirstInput,
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bool supportsGraph,
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const uint32_t* requiredInputCountForGraph,
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bool supportedWith64BitTensorsVia32BitStrides,
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bool supportedWith64BitTensorsVia32BitStridesFromAnyEp,
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bool prefer64BitTensorsDirectly,
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bool support64BitTensorsViaEmulation,
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_In_reads_(constantCpuInputCount) const uint32_t* requiredConstantCpuInputs,
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uint32_t constantCpuInputCount) const noexcept
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{
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@ -471,10 +467,6 @@ HRESULT STDMETHODCALLTYPE AbiCustomRegistry::RegisterOperatorKernel(
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{
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auto regInfo = std::make_shared<InternalRegistrationInfo>();
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regInfo->requiredConstantCpuInputs = constantCpuInputCapture;
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regInfo->supportedWith64BitTensorsVia32BitStrides = supportedWith64BitTensorsVia32BitStrides;
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regInfo->supportedWith64BitTensorsVia32BitStridesFromAnyEp = supportedWith64BitTensorsVia32BitStridesFromAnyEp;
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regInfo->prefer64BitTensorsDirectly = prefer64BitTensorsDirectly;
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regInfo->support64BitTensorsViaEmulation = support64BitTensorsViaEmulation;
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// Only internal operators support usage in DML graphs
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if (supportsGraph)
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@ -546,11 +538,7 @@ HRESULT STDMETHODCALLTYPE AbiCustomRegistry::RegisterOperatorKernel(
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if (canAliasFirstInput ||
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supportsGraph ||
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requiredInputCountForGraph ||
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requiredConstantCpuInputs ||
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supportedWith64BitTensorsVia32BitStrides ||
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supportedWith64BitTensorsVia32BitStridesFromAnyEp ||
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prefer64BitTensorsDirectly ||
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support64BitTensorsViaEmulation)
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requiredConstantCpuInputs)
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{
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ORT_THROW_HR(E_INVALIDARG);
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}
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@ -41,10 +41,6 @@ class AbiCustomRegistry : public WRL::Base<IMLOperatorRegistry, IMLOperatorRegis
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bool canAliasFirstInput,
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bool supportsGraph,
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const uint32_t* requiredInputCountForGraph = nullptr,
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bool supportedWith64BitTensorsVia32BitStrides = false,
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bool supportedWith64BitTensorsVia32BitStridesFromAnyEp = false,
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bool prefer64BitTensorsDirectly = false,
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bool support64BitTensorsViaEmulation = false,
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_In_reads_(constantCpuInputCount) const uint32_t* requiredConstantCpuInputs = nullptr,
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uint32_t constantCpuInputCount = 0) const noexcept override;
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@ -139,78 +139,6 @@ namespace Dml
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}
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};
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bool NodeArgSupportedInGraph(
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const onnxruntime::NodeArg* arg,
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bool supports64BitTensorsViaEmulation,
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uint32_t supportedDeviceDataTypeMask
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)
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{
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if (arg->Exists())
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{
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const onnx::TypeProto* typeProto = arg->TypeAsProto();
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if (typeProto->value_case() == onnx::TypeProto::kTensorType)
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{
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const onnx::TypeProto_Tensor tensorType = typeProto->tensor_type();
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if (tensorType.has_elem_type())
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{
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// TODO: Remove this by handling zeroing on the output of fused graph nodes and handling of non-float
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// types in DML's identity operator, which is used for strided copies.
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MLOperatorTensorDataType mlDataType = ToMLTensorDataType(static_cast<onnx::TensorProto_DataType>(tensorType.elem_type()));
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// Do not include operators in the graph if tensor types are unsupported,
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// except cases that are always supported via emulation.
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if ((mlDataType == MLOperatorTensorDataType::UInt64 ||
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mlDataType == MLOperatorTensorDataType::Int64) &&
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!supports64BitTensorsViaEmulation)
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{
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constexpr uint32_t deviceDataTypeMask64bit = (1 << DML_TENSOR_DATA_TYPE_UINT64) | (1 << DML_TENSOR_DATA_TYPE_INT64);
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if ((supportedDeviceDataTypeMask & deviceDataTypeMask64bit) != deviceDataTypeMask64bit)
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{
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return false;
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}
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}
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}
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}
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}
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return true;
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}
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bool NodeTensorTypesSupportedInGraph(const onnxruntime::Node& node, const InternalRegistrationInfo& registration, uint32_t supportedDeviceDataTypeMask)
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{
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for (size_t i = 0; i < node.InputDefs().size(); ++i)
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{
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bool isConstantCpuInput = std::find(registration.requiredConstantCpuInputs.begin(), registration.requiredConstantCpuInputs.end(), i) !=
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registration.requiredConstantCpuInputs.end();
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if (!isConstantCpuInput &&
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!NodeArgSupportedInGraph(
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node.InputDefs()[i],
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registration.support64BitTensorsViaEmulation,
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supportedDeviceDataTypeMask
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))
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{
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return false;
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}
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}
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for (auto arg : node.OutputDefs())
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{
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if (!NodeArgSupportedInGraph(
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arg,
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registration.support64BitTensorsViaEmulation,
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supportedDeviceDataTypeMask
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))
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{
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return false;
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}
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}
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return true;
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}
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bool TryGetTensorDataType(
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const onnxruntime::NodeArg& nodeArg,
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_Out_ MLOperatorTensorDataType* onnxElementType
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@ -242,26 +170,10 @@ namespace Dml
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{
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ORT_THROW_HR_IF(E_INVALIDARG, allow64BitInputThroughStrides && !nodeNameToPartitionMap);
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bool prefer64BitTensorsDirectly = false;
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bool support64BitTensorsViaEmulation = false;
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bool supportedWith64BitTensorsVia32BitStrides = false;
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bool supportedWith64BitTensorsVia32BitStridesFromAnyEp = false;
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std::vector<onnxruntime::NodeArg const*> constantCpuInputs;
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if (regInfo != nullptr)
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{
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// Read the operator flags for handling 64-bit tensors and whether it's allowed to fall back
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// to 32-bit tensors via strides. If the caller passes allow64BitInputThroughStrides = false
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// in this particular call, then the operator-specific flags do not matter as the caller has
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// disabled 64-bit support.
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prefer64BitTensorsDirectly = regInfo->prefer64BitTensorsDirectly;
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support64BitTensorsViaEmulation = regInfo->support64BitTensorsViaEmulation;
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if (allow64BitInputThroughStrides)
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{
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supportedWith64BitTensorsVia32BitStridesFromAnyEp = regInfo->supportedWith64BitTensorsVia32BitStridesFromAnyEp;
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supportedWith64BitTensorsVia32BitStrides = regInfo->supportedWith64BitTensorsVia32BitStrides | supportedWith64BitTensorsVia32BitStridesFromAnyEp;
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}
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// Collect the list of CPU-bound input tensors, needed when checking 64-bit fallback
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// or for other data types like int-8 which may be supported for CPU inputs but not
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// GPU inputs.
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@ -317,55 +229,7 @@ namespace Dml
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return;
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}
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// If this operator implements 64-bit support in terms of strided 32-bit tensors,
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// then the data type needs to be remapped, regardless of whether input or output.
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//
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// Some operators can fairly safely implement 64-bit tensors in terms of
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// strided 32-bit tensors regardless of input tensor's execution provider
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// because the indices measure along a single axis and should fall within
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// the range of an int32/uint32.
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//
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// Currently all DML kernels outputting int64 and uint64 are expected to
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// not *introduce* values out of range, which allows the temporary trick
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// using strides to emulate 64 bit tensors to work. If the source is a CPU
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// operator, graph input or initializer, it's not safe to assume the input
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// can be represented with 32 bits.
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//
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bool isDataTypeSupported = (1 << dmlElementType) & supportedDeviceDataTypeMask;
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bool is64BitIntType = (dmlElementType == DML_TENSOR_DATA_TYPE_UINT64 || dmlElementType == DML_TENSOR_DATA_TYPE_INT64);
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if (is64BitIntType)
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{
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if (support64BitTensorsViaEmulation)
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{
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// Consider it supported regardless of hardware support.
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isDataTypeSupported = true;
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}
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else if (prefer64BitTensorsDirectly && isDataTypeSupported)
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{
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// Operator supports native int64/uint64 tensors.
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}
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else if (supportedWith64BitTensorsVia32BitStrides || supportedWith64BitTensorsVia32BitStridesFromAnyEp)
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{
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dmlElementType = Remap64bitDmlDataTypeTo32bit(dmlElementType);
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isDataTypeSupported = (1 << dmlElementType) & supportedDeviceDataTypeMask;
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if (isInput && !supportedWith64BitTensorsVia32BitStridesFromAnyEp)
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{
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// Look up the input partition. If it's a graph input or initializer it will be missing
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// from the partition map.
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const std::string& argName = nodeArg.Name();
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// If input tensor's data comes from the output of a different execution provider,
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// consider it unsafe to apply fallback to.
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auto partitionIter = nodeNameToPartitionMap->find(argName);
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if (partitionIter == nodeNameToPartitionMap->end() || !partitionIter->second->IsDmlPartition())
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{
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nodeContainsSupportedDataTypes = false;
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return;
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}
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}
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}
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}
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// Reject node if the data type is unsupported by the device.
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if (!isDataTypeSupported)
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@ -465,8 +329,7 @@ namespace Dml
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{
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auto internalRegInfo = regInfoIter->second;
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if (internalRegInfo && internalRegInfo->graphNodeFactoryRegistration &&
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NodeTensorTypesSupportedInGraph(node, *internalRegInfo, supportedDeviceDataTypeMask))
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if (internalRegInfo && internalRegInfo->graphNodeFactoryRegistration)
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{
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bool requiredCpuInputsConstant = true;
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for (uint32_t inputIndex : internalRegInfo->requiredConstantCpuInputs)
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@ -389,34 +389,6 @@ namespace Dml
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));
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}
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void DmlOperator::Remap64bitDmlDataTypesTo32bit()
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{
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for (auto& tensor : m_inputTensorDescs)
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{
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tensor.Remap64bitDmlDataTypeTo32bit();
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}
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for (auto& tensor : m_outputTensorDescs)
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{
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tensor.Remap64bitDmlDataTypeTo32bit();
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}
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}
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void DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded()
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{
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// Conditionally remap 64-bit data types to strided 32-bit if DML does not
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// support 64-bit data types directly on the device.
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uint32_t deviceTypeMask = Dml::GetSupportedDeviceDataTypeMask(m_dmlDevice.Get());
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uint32_t deviceTypeMask64bit = (1 << DML_TENSOR_DATA_TYPE_INT64) | (1 << DML_TENSOR_DATA_TYPE_UINT64);
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// If the device doesn't support 64-bit tensors, fall back to 32-bit with strides.
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if (!(deviceTypeMask & deviceTypeMask64bit))
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{
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Remap64bitDmlDataTypesTo32bit();
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}
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}
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TensorDesc DmlOperator::CreateTensorDescFromInput(
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const MLOperatorKernelCreationContext& kernelInfo,
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uint32_t index,
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@ -85,11 +85,6 @@ namespace Dml
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void ExecuteZeroInt64Tensor(IDMLCompiledOperator* compiledOperator, IMLOperatorTensor* tensor);
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// Remap 64-bit data types to 32-bit via doubled strides.
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// These should be called before GetDmlInputDescs or GetDmlOutputDescs.
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void Remap64bitDmlDataTypesTo32bit();
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void Remap64bitDmlDataTypesTo32bitIfNeeded();
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TensorDesc CreateTensorDescFromInput(
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const MLOperatorKernelCreationContext& kernelInfo,
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uint32_t index,
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@ -24,8 +24,6 @@ public:
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size_t dimensionCountMax = std::max({dataDimensions.size(), indicesDimensions.size(), outputDimensions.size()});
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DmlOperator::Initialize(kernelCreationContext, gsl::narrow_cast<uint32_t>(dimensionCountMax));
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DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
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std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
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std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
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assert(inputDescs.size() == 2);
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@ -62,8 +60,6 @@ public:
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size_t dimensionCountMax = std::max({dataDimensions.size(), indicesDimensions.size(), outputDimensions.size()});
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DmlOperator::Initialize(kernelCreationContext, gsl::narrow_cast<uint32_t>(dimensionCountMax));
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DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
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std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
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std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
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assert(inputDescs.size() == 2);
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@ -101,8 +97,6 @@ public:
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size_t dimensionCountMax = std::max({dataDimensions.size(), indicesDimensions.size(), outputDimensions.size()});
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DmlOperator::Initialize(kernelCreationContext, gsl::narrow_cast<uint32_t>(dimensionCountMax));
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DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
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std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
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std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
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assert(inputDescs.size() == 2);
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@ -22,7 +22,6 @@ public:
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std::vector<std::optional<uint32_t>> inputIndices = { 0, 1 }; // The 3rd tensor ('output_shape') is not bound, just 'X' and 'I' indices.
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std::vector<std::optional<uint32_t>> outputIndices = { 0 };
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DmlOperator::Initialize(kernelCreationContext, inputIndices, outputIndices);
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DmlOperator::Remap64bitDmlDataTypesTo32bit();
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m_inputTensorDescs[1].ForceUnsignedDataType(); // MaxUnpool accepts uint32_t.
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std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
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@ -53,8 +53,6 @@ public:
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0
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);
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DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
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// Adjust the axis so it's in DML's terms rather than the original ONNX indexing.
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uint32_t dmlAxis = GetDmlAdjustedAxis(
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m_absoluteAxis,
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@ -111,8 +111,7 @@ public:
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if (hasOutputIndices)
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{
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DmlOperator::Remap64bitDmlDataTypesTo32bit();
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m_outputTensorDescs[1].ForceUnsignedDataType(); // MaxPool accepts uint32_t.
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m_outputTensorDescs[1].ForceUnsignedDataType(); // MaxPool accepts uint32_t/uint64_t.
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desc.OutputIndicesTensor = &outputDescs[1];
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}
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@ -67,14 +67,6 @@ public:
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argmaxDesc.Axes = dmlAxes.data();
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argmaxDesc.AxisCount = gsl::narrow_cast<uint32_t>(dmlAxes.size());
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// If the 64-bit tensors were remapped to 32-bit, then we need to clear the upper 32-bits
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// of each element. If the device directly supports 64-bit elements, then no need.
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DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
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if (m_outputTensorDescs[0].WasRemapped64bitTo32bit())
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{
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m_zeroOperator = InitializeZeroInt64Tensor(m_outputTensorDescs[0].GetBufferSizeInBytes());
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}
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DML_OPERATOR_DESC opDesc = { DML_OPERATOR_ARGMAX, &argmaxDesc };
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SetDmlOperatorDesc(opDesc, kernelInfo);
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}
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@ -87,14 +79,6 @@ public:
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argminDesc.Axes = dmlAxes.data();
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argminDesc.AxisCount = gsl::narrow_cast<uint32_t>(dmlAxes.size());
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// If the 64-bit tensors were remapped to 32-bit, then we need to clear the upper 32-bits
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// of each element. If the device directly supports 64-bit elements, then no need.
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DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
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if (m_outputTensorDescs[0].WasRemapped64bitTo32bit())
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{
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m_zeroOperator = InitializeZeroInt64Tensor(m_outputTensorDescs[0].GetBufferSizeInBytes());
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}
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DML_OPERATOR_DESC opDesc = { DML_OPERATOR_ARGMIN, &argminDesc };
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SetDmlOperatorDesc(opDesc, kernelInfo);
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}
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@ -117,20 +101,12 @@ public:
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std::vector<IMLOperatorTensor*> inputTensors = GetInputTensorsForExecute(kernelContext);
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std::vector<IMLOperatorTensor*> outputTensors = GetOutputTensorsForExecute(kernelContext);
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if (m_zeroOperator)
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{
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ExecuteZeroInt64Tensor(m_zeroOperator.Get(), outputTensors[0]);
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}
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ORT_THROW_IF_FAILED(m_executionProvider->ExecuteOperator(
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m_compiledOperator.Get(),
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m_persistentResourceBinding ? &*m_persistentResourceBinding : nullptr,
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gsl::make_span(inputTensors),
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gsl::make_span(outputTensors)));
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}
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private:
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ComPtr<IDMLCompiledOperator> m_zeroOperator;
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};
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// A specific type of operation for registration.
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@ -47,8 +47,7 @@ public:
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|||
0
|
||||
);
|
||||
|
||||
DmlOperator::Remap64bitDmlDataTypesTo32bit();
|
||||
m_inputTensorDescs[1].ForceUnsignedDataType(); // DML operator accepts uint32_t.
|
||||
m_inputTensorDescs[1].ForceUnsignedDataType(); // DML operator accepts uint32_t/uint64_t for sequence_lengths.
|
||||
|
||||
std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
|
||||
std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
|
||||
|
|
|
|||
|
|
@ -19,8 +19,7 @@ public:
|
|||
ML_CHECK_VALID_ARGUMENT(kernelCreationContext.GetOutputCount() == 1, "RoiAlign expects 1 output tensor.");
|
||||
|
||||
DmlOperator::Initialize(kernelCreationContext);
|
||||
DmlOperator::Remap64bitDmlDataTypesTo32bit();
|
||||
m_inputTensorDescs[2].ForceUnsignedDataType();
|
||||
m_inputTensorDescs[2].ForceUnsignedDataType(); // DML operator accepts uint32_t/uint64_t for batch_indices tensor.
|
||||
|
||||
std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
|
||||
std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
|
||||
|
|
|
|||
|
|
@ -24,13 +24,12 @@ public:
|
|||
ML_CHECK_VALID_ARGUMENT(indicesDimensions == updatesDimensions);
|
||||
ML_CHECK_VALID_ARGUMENT(dataDimensions.size() == indicesDimensions.size());
|
||||
|
||||
// When the indices tensor is empty, Scatter is basically Identity. But since DML doesn't support empty or null
|
||||
// When the indices tensor is empty, Scatter is basically Identity. But since DML doesn't yet support empty
|
||||
// tensors, we have to special-case it outside of DML.
|
||||
if (OperatorHelper::ContainsEmptyDimensions(indicesDimensions))
|
||||
{
|
||||
std::vector<std::optional<uint32_t>> kernelInputIndices(1, 0);
|
||||
DmlOperator::Initialize(kernelCreationContext, kernelInputIndices);
|
||||
DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
|
||||
|
||||
std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
|
||||
std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
|
||||
|
|
@ -49,7 +48,6 @@ public:
|
|||
else
|
||||
{
|
||||
DmlOperator::Initialize(kernelCreationContext);
|
||||
DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
|
||||
|
||||
std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
|
||||
std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
|
||||
|
|
@ -91,7 +89,6 @@ public:
|
|||
|
||||
size_t dimensionCountMax = std::max({dataDimensions.size(), updatesDimensions.size(), indicesDimensions.size(), outputDimensions.size()});
|
||||
DmlOperator::Initialize(kernelCreationContext, gsl::narrow_cast<uint32_t>(dimensionCountMax));
|
||||
DmlOperator::Remap64bitDmlDataTypesTo32bitIfNeeded();
|
||||
|
||||
std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
|
||||
std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
|
||||
|
|
|
|||
|
|
@ -22,8 +22,7 @@ public:
|
|||
std::vector<std::optional<uint32_t>> inputIndices = { 0 }; // Use only the first tensor. The second tensor is CPU-based.
|
||||
std::vector<std::optional<uint32_t>> outputIndices = { 0, 1 };
|
||||
DmlOperator::Initialize(kernelCreationContext, inputIndices, outputIndices);
|
||||
DmlOperator::Remap64bitDmlDataTypesTo32bit();
|
||||
m_outputTensorDescs[1].ForceUnsignedDataType();
|
||||
m_outputTensorDescs[1].ForceUnsignedDataType(); // DML operator accepts uint32_t/uint64 for indices tensor.
|
||||
|
||||
std::vector<DML_TENSOR_DESC> inputDescs = GetDmlInputDescs();
|
||||
std::vector<DML_TENSOR_DESC> outputDescs = GetDmlOutputDescs();
|
||||
|
|
|
|||
|
|
@ -55,10 +55,6 @@ enum class DmlGraphSupport : uint32_t
|
|||
{
|
||||
Supported = 0,
|
||||
NotSupported = 1,
|
||||
SupportedWith64BitTensorsVia32BitStrides = 2, // Supports them via 32-bit tensors and doubled strides.
|
||||
SupportedWith64BitTensorsVia32BitStridesFromAnyEp = 4, // Supports input from any execution provider (otherwise only inputs from other DML nodes)
|
||||
Prefer64BitTensorsDirectly = 8, // Natively supports 64-bit tensors. So avoid strided 32-bit unless the device lacks support.
|
||||
Support64BitTensorsViaEmulation = 16,// supports int/uint64 tensors via emulation of 32-bit types.
|
||||
};
|
||||
DEFINE_ENUM_FLAG_OPERATORS(DmlGraphSupport);
|
||||
|
||||
|
|
@ -375,18 +371,18 @@ constexpr static OperatorRegistrationInformation operatorRegistrationInformation
|
|||
{REG_INFO( 10, AveragePool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, AveragePool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, GlobalAveragePool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, MaxPool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported|DmlGraphSupport::SupportedWith64BitTensorsVia32BitStrides)},
|
||||
{REG_INFO( 8, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
{REG_INFO( 10, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
{REG_INFO( 11, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
{REG_INFO( 12, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
{REG_INFO( 7, MaxPool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 8, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
{REG_INFO( 10, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
{REG_INFO( 11, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
{REG_INFO( 12, MaxPool, typeNameListMaxPool, supportedTypeListMaxPool, DmlGraphSupport::Supported, requiredConstantCpuInputs(), std::nullopt, QueryMaxPool)},
|
||||
|
||||
{REG_INFO( 7, GlobalMaxPool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, LpPool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, LpPool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, GlobalLpPool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, MaxRoiPool, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 10, RoiAlign, typeNameListTwo, supportedTypeListRoiAlign, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 10, RoiAlign, typeNameListTwo, supportedTypeListRoiAlign, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, InstanceNormalization, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, BatchNormalization, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 9, BatchNormalization, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)}, // v9 just removes 'spatial' attribute.
|
||||
|
|
@ -402,60 +398,60 @@ constexpr static OperatorRegistrationInformation operatorRegistrationInformation
|
|||
{REG_INFO_MS( 1, ConvTransposeWithDynamicPads, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(2))},
|
||||
|
||||
// Data Reorganization Layers
|
||||
{REG_INFO( 7, Split, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, Split, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)}, // Adds negative axis.
|
||||
{REG_INFO( 7, Transpose, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Transpose, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Concat, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, Concat, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)}, // Adds negative axis.
|
||||
{REG_INFO( 13, Concat, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)}, // Adds negative axis.
|
||||
{REG_INFO_VER( 7, Slice, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 10, Slice, typeNameListSlice10, supportedTypeListSlice10, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1, 2, 3, 4), std::nullopt, QuerySlice)}, // Adds negative axes.
|
||||
{REG_INFO_VER( 11, Slice, typeNameListSlice10, supportedTypeListSlice10, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1, 2, 3, 4), std::nullopt, QuerySlice)},
|
||||
{REG_INFO_VER( 13, Slice, typeNameListSlice10, supportedTypeListSlice10, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1, 2, 3, 4), std::nullopt, QuerySlice)},
|
||||
{REG_INFO_VER( 7, Pad, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 11, Pad, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1, 2) /*pads, value*/)}, // https://microsoft.visualstudio.com/OS/_workitems/edit/26007728
|
||||
{REG_INFO_VER( 13, Pad, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1, 2) /*pads, value*/)}, // https://microsoft.visualstudio.com/OS/_workitems/edit/26007728
|
||||
{REG_INFO( 7, SpaceToDepth, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, SpaceToDepth, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, DepthToSpace, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, DepthToSpace, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, DepthToSpace, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Tile, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 13, Tile, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 8, Expand, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 13, Expand, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 9, ConstantOfShape, typeNameListConstantOfShape, supportedTypeListConstantOfShape, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(0))},
|
||||
{REG_INFO( 7, Gather, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, Gather, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Gather, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, GatherElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, GatherElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, GatherND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 12, GatherND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, GatherND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 9, Scatter, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 11, Scatter, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 13, Scatter, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, ScatterElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, ScatterElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, ScatterND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, ScatterND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Split, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, Split, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)}, // Adds negative axis.
|
||||
{REG_INFO( 7, Transpose, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Transpose, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Concat, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, Concat, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)}, // Adds negative axis.
|
||||
{REG_INFO( 13, Concat, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)}, // Adds negative axis.
|
||||
{REG_INFO_VER( 7, Slice, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 10, Slice, typeNameListSlice10, supportedTypeListSlice10, DmlGraphSupport::Supported, requiredConstantCpuInputs(1, 2, 3, 4), std::nullopt, QuerySlice)}, // Adds negative axes.
|
||||
{REG_INFO_VER( 11, Slice, typeNameListSlice10, supportedTypeListSlice10, DmlGraphSupport::Supported, requiredConstantCpuInputs(1, 2, 3, 4), std::nullopt, QuerySlice)},
|
||||
{REG_INFO_VER( 13, Slice, typeNameListSlice10, supportedTypeListSlice10, DmlGraphSupport::Supported, requiredConstantCpuInputs(1, 2, 3, 4), std::nullopt, QuerySlice)},
|
||||
{REG_INFO_VER( 7, Pad, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 11, Pad, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1, 2) /*pads, value*/)}, // https://microsoft.visualstudio.com/OS/_workitems/edit/26007728
|
||||
{REG_INFO_VER( 13, Pad, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1, 2) /*pads, value*/)}, // https://microsoft.visualstudio.com/OS/_workitems/edit/26007728
|
||||
{REG_INFO( 7, SpaceToDepth, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, SpaceToDepth, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, DepthToSpace, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, DepthToSpace, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, DepthToSpace, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Tile, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 13, Tile, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 8, Expand, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 13, Expand, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 9, ConstantOfShape, typeNameListConstantOfShape, supportedTypeListConstantOfShape, DmlGraphSupport::Supported, requiredConstantCpuInputs(0))},
|
||||
{REG_INFO( 7, Gather, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, Gather, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Gather, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, GatherElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, GatherElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, GatherND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 12, GatherND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, GatherND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 9, Scatter, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 11, Scatter, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 13, Scatter, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, ScatterElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, ScatterElements, typeNameListScatterGather, supportedTypeListScatterGather, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, ScatterND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, ScatterND, typeNameListScatterGatherND, supportedTypeListScatterGatherND, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 9, EyeLike, typeNameListEyeLike, supportedTypeListScalars8to32, DmlGraphSupport::Supported)},
|
||||
|
||||
// Data reorganization that merely changes the dimensions while keeping the data identical.
|
||||
{REG_INFO_ID( 7, Identity, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 13, Identity, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 7, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 9, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 11, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 13, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 7, Squeeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 11, Squeeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 7, Unsqueeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 11, Unsqueeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_ID( 7, Reshape, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO_ID( 13, Reshape, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO_ID( 7, Identity, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 13, Identity, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 7, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 9, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 11, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 13, Flatten, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 7, Squeeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 11, Squeeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 7, Unsqueeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 11, Unsqueeze, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_ID( 7, Reshape, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO_ID( 13, Reshape, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
|
||||
// Elementwise
|
||||
{REG_INFO( 7, Sqrt, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
|
|
@ -477,14 +473,14 @@ constexpr static OperatorRegistrationInformation operatorRegistrationInformation
|
|||
{REG_INFO( 13, Floor, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 7, Clip, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 11, Clip, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(1,2))},
|
||||
{REG_INFO_VER( 12, Clip, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1,2))},
|
||||
{REG_INFO_VER( 13, Clip, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1,2))},
|
||||
{REG_INFO( 7, Add, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Add, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Sub, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Sub, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Mul, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Mul, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 12, Clip, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported, requiredConstantCpuInputs(1,2))},
|
||||
{REG_INFO_VER( 13, Clip, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported, requiredConstantCpuInputs(1,2))},
|
||||
{REG_INFO( 7, Add, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Add, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Sub, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Sub, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Mul, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Mul, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Div, typeNameListDefault, supportedTypeListFloat16to32Ints32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Div, typeNameListDefault, supportedTypeListFloat16to32Ints32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Sum, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
|
|
@ -495,12 +491,12 @@ constexpr static OperatorRegistrationInformation operatorRegistrationInformation
|
|||
{REG_INFO( 13, Mean, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 7, Max, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 8, Max, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 12, Max, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 13, Max, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 12, Max, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 13, Max, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 7, Min, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 8, Min, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 12, Min, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 13, Min, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 12, Min, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 13, Min, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported, requiredConstantCpuInputs(), 2)},
|
||||
{REG_INFO( 7, Cos, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Sin, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Tan, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
|
|
@ -550,37 +546,37 @@ constexpr static OperatorRegistrationInformation operatorRegistrationInformation
|
|||
{REG_INFO( 13, ReduceL2, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, ReduceMax, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, ReduceMax, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 12, ReduceMax, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, ReduceMax, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 12, ReduceMax, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, ReduceMax, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, ReduceMin, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, ReduceMin, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 12, ReduceMin, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, ReduceMin, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 12, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 12, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 12, ReduceMin, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, ReduceMin, typeNameListDefault, supportedTypeListFloat16to32Ints8to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 12, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, ArgMax, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 12, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, ArgMin, typeNameListDefault, supportedTypeListArgMinMax, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Gemm, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 9, Gemm, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, Gemm, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Gemm, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Neg, typeNameListDefault, supportedTypeListSigned, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Neg, typeNameListDefault, supportedTypeListSigned, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Greater, typeNameListLogicalComparison, supportedTypeListLogicalComparison7, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 9, Greater, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Greater, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Less, typeNameListLogicalComparison, supportedTypeListLogicalComparison7, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 9, Less, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Less, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 12, GreaterOrEqual, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 12, LessOrEqual, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Equal, typeNameListLogicalComparison, supportedTypeListLogicalComparison7, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, Equal, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Equal, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Greater, typeNameListLogicalComparison, supportedTypeListLogicalComparison7, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 9, Greater, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Greater, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Less, typeNameListLogicalComparison, supportedTypeListLogicalComparison7, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 9, Less, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Less, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 12, GreaterOrEqual, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 12, LessOrEqual, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Equal, typeNameListLogicalComparison, supportedTypeListLogicalComparison7, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, Equal, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Equal, typeNameListLogicalComparison, supportedTypeListLogicalComparison9, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Not, typeNameListDefault, supportedTypeListBool, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, And, typeNameListDefault, supportedTypeListBool, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Or, typeNameListDefault, supportedTypeListBool, DmlGraphSupport::Supported)},
|
||||
|
|
@ -629,16 +625,16 @@ constexpr static OperatorRegistrationInformation operatorRegistrationInformation
|
|||
{REG_INFO( 7, MatMul, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 9, MatMul, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, MatMul, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, Cast, typeNameListTwo, supportedTypeListCast, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 9, Cast, typeNameListTwo, supportedTypeListCast, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 13, Cast, typeNameListTwo, supportedTypeListCast, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 7, Cast, typeNameListTwo, supportedTypeListCast, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 9, Cast, typeNameListTwo, supportedTypeListCast, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Cast, typeNameListTwo, supportedTypeListCast, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 7, MemcpyFromHost, typeNameListDefault, supportedTypeListAll)},
|
||||
{REG_INFO( 7, MemcpyToHost, typeNameListDefault, supportedTypeListAll)},
|
||||
{REG_INFO_VER( 7, TopK, typeNameListTopK, supportedTypeListTopK, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO_VER( 10, TopK, typeNameListTopK, supportedTypeListTopK, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO_VER( 11, TopK, typeNameListTopK, supportedTypeListTopK, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 9, OneHot, typeNameListThree, supportedTypeListOneHot, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 11, OneHot, typeNameListThree, supportedTypeListOneHot, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO_VER( 7, TopK, typeNameListTopK, supportedTypeListTopK, DmlGraphSupport::Supported)},
|
||||
{REG_INFO_VER( 10, TopK, typeNameListTopK, supportedTypeListTopK, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO_VER( 11, TopK, typeNameListTopK, supportedTypeListTopK, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 9, OneHot, typeNameListThree, supportedTypeListOneHot, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 11, OneHot, typeNameListThree, supportedTypeListOneHot, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
|
||||
// Fused operators
|
||||
{REG_INFO_MSDML(1, FusedConv, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
|
|
@ -654,14 +650,14 @@ constexpr static OperatorRegistrationInformation operatorRegistrationInformation
|
|||
{REG_INFO( 10, IsInf, typeNameListTwo, supportedTypeListIsInf, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 10, Mod, typeNameListDefault, supportedTypeListNumericDefault, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 13, Mod, typeNameListDefault, supportedTypeListNumericDefault, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, BitShift, typeNameListDefault, supportedTypeListUInt8to64, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 11, BitShift, typeNameListDefault, supportedTypeListUInt8to64, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, Round, typeNameListDefault, supportedTypeListFloat16to32, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 10, ReverseSequence, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly)},
|
||||
{REG_INFO( 10, ReverseSequence, typeNameListDefault, supportedTypeListAllScalars, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 11, CumSum, typeNameListDefault, supportedTypeListFloat16to32Ints32to64, DmlGraphSupport::Supported, requiredConstantCpuInputs(1))},
|
||||
{REG_INFO( 11, Range, typeNameListDefault, supportedTypeListRange, DmlGraphSupport::Supported, requiredConstantCpuInputs(0,1,2))},
|
||||
|
||||
{REG_INFO( 9, MaxUnpool, typeNameListTwo, supportedTypeListMaxUnpool, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(2))},
|
||||
{REG_INFO( 11, MaxUnpool, typeNameListTwo, supportedTypeListMaxUnpool, DmlGraphSupport::Supported|DmlGraphSupport::Prefer64BitTensorsDirectly, requiredConstantCpuInputs(2))}, // 11 is identical to 9.
|
||||
{REG_INFO( 9, MaxUnpool, typeNameListTwo, supportedTypeListMaxUnpool, DmlGraphSupport::Supported, requiredConstantCpuInputs(2))},
|
||||
{REG_INFO( 11, MaxUnpool, typeNameListTwo, supportedTypeListMaxUnpool, DmlGraphSupport::Supported, requiredConstantCpuInputs(2))}, // 11 is identical to 9.
|
||||
|
||||
{REG_INFO_MS( 1, QLinearAdd, typeNameListDefault, supportedTypeListInteger8, DmlGraphSupport::Supported)},
|
||||
{REG_INFO( 10, QLinearConv, typeNameListFour, supportedTypeListQLinearConv, DmlGraphSupport::Supported)},
|
||||
|
|
@ -696,10 +692,6 @@ void RegisterDmlOperators(IMLOperatorRegistry* registry)
|
|||
|
||||
// The graph must be configured with operators from only the legacy DML API, or only the new DML API
|
||||
bool kernelSupportsGraph = !bool(information.dmlGraphSupport & DmlGraphSupport::NotSupported);
|
||||
bool prefer64BitTensorsDirectly = bool(information.dmlGraphSupport & DmlGraphSupport::Prefer64BitTensorsDirectly);
|
||||
bool support64BitTensorsViaEmulation = bool(information.dmlGraphSupport & DmlGraphSupport::Support64BitTensorsViaEmulation);
|
||||
bool supportedWith64BitTensorsVia32BitStrides = bool(information.dmlGraphSupport & DmlGraphSupport::SupportedWith64BitTensorsVia32BitStrides);
|
||||
bool supportedWith64BitTensorsVia32BitStridesFromAnyEp = bool(information.dmlGraphSupport & DmlGraphSupport::SupportedWith64BitTensorsVia32BitStridesFromAnyEp);
|
||||
|
||||
desc.options = information.shapeInferenceFunction ?
|
||||
MLOperatorKernelOptions::None : MLOperatorKernelOptions::AllowDynamicInputShapes;
|
||||
|
|
@ -780,10 +772,6 @@ void RegisterDmlOperators(IMLOperatorRegistry* registry)
|
|||
information.canAliasFirstInput, // alias
|
||||
kernelSupportsGraph, // supportsGraph
|
||||
information.requiredInputCountForDmlGraphSupport ? &(*information.requiredInputCountForDmlGraphSupport) : nullptr,
|
||||
supportedWith64BitTensorsVia32BitStrides,
|
||||
supportedWith64BitTensorsVia32BitStridesFromAnyEp,
|
||||
prefer64BitTensorsDirectly,
|
||||
support64BitTensorsViaEmulation,
|
||||
information.requiredConstantCpuInputs.first.data(),
|
||||
static_cast<uint32_t>(information.requiredConstantCpuInputs.second)
|
||||
));
|
||||
|
|
|
|||
|
|
@ -257,13 +257,6 @@ void TensorDesc::Remap64bitDmlDataTypeTo32bit()
|
|||
) + endPaddingInBytes;
|
||||
}
|
||||
|
||||
bool TensorDesc::WasRemapped64bitTo32bit() const
|
||||
{
|
||||
bool was64BitIntType = (m_mlOperatorTensorDataType == MLOperatorTensorDataType::UInt64 || m_mlOperatorTensorDataType == MLOperatorTensorDataType::Int64);
|
||||
bool is32BitIntType = (m_bufferTensorDesc.DataType == DML_TENSOR_DATA_TYPE_UINT32 || m_bufferTensorDesc.DataType == DML_TENSOR_DATA_TYPE_INT32);
|
||||
return was64BitIntType && is32BitIntType;
|
||||
}
|
||||
|
||||
gsl::span<const uint32_t> TensorDesc::GetStrides() const
|
||||
{
|
||||
if (m_bufferTensorDesc.Strides == nullptr)
|
||||
|
|
|
|||
|
|
@ -38,7 +38,6 @@ namespace Dml
|
|||
inline MLOperatorTensorDataType GetMlOperatorDataType() const { return m_mlOperatorTensorDataType; }
|
||||
void ForceUnsignedDataType();
|
||||
void Remap64bitDmlDataTypeTo32bit();
|
||||
bool WasRemapped64bitTo32bit() const;
|
||||
|
||||
inline bool IsValid() const { return m_tensorType != DML_TENSOR_TYPE_INVALID; }
|
||||
inline uint32_t GetDimensionCount() const { return m_bufferTensorDesc.DimensionCount; }
|
||||
|
|
|
|||
|
|
@ -111,10 +111,6 @@ IMLOperatorRegistryPrivate : public IUnknown
|
|||
bool canAliasFirstInput,
|
||||
bool supportsGraph,
|
||||
const uint32_t* requiredInputCountForGraph = nullptr,
|
||||
bool supportedWith64BitTensorsVia32BitStrides = false,
|
||||
bool supportedWith64BitTensorsVia32BitStridesFromAnyEp = false,
|
||||
bool prefer64BitTensorsDirectly = false,
|
||||
bool support64BitTensorsViaEmulation = false,
|
||||
_In_reads_(constantCpuInputCount) const uint32_t* constantCpuInputs = nullptr,
|
||||
uint32_t constantCpuInputCount = 0
|
||||
) const noexcept PURE;
|
||||
|
|
|
|||
|
|
@ -55,10 +55,6 @@ HRESULT STDMETHODCALLTYPE AbiCustomRegistryImpl::RegisterOperatorKernel(
|
|||
bool canAliasFirstInput,
|
||||
bool supportsGraph,
|
||||
const uint32_t* requiredInputCountForGraph,
|
||||
bool supportedWith64BitTensorsVia32BitStrides,
|
||||
bool supportedWith64BitTensorsVia32BitStridesFromAnyEp,
|
||||
bool prefer64BitTensorsDirectly,
|
||||
bool support64BitTensorsViaEmulation,
|
||||
_In_reads_(constantCpuInputCount) const uint32_t* requiredConstantCpuInputs,
|
||||
uint32_t constantCpuInputCount) const noexcept try {
|
||||
#ifdef LAYERING_DONE
|
||||
|
|
@ -81,10 +77,6 @@ HRESULT STDMETHODCALLTYPE AbiCustomRegistryImpl::RegisterOperatorKernel(
|
|||
canAliasFirstInput,
|
||||
supportsGraph,
|
||||
requiredInputCountForGraph,
|
||||
supportedWith64BitTensorsVia32BitStrides,
|
||||
supportedWith64BitTensorsVia32BitStridesFromAnyEp,
|
||||
prefer64BitTensorsDirectly,
|
||||
support64BitTensorsViaEmulation,
|
||||
requiredConstantCpuInputs,
|
||||
constantCpuInputCount);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,10 +28,6 @@ class AbiCustomRegistryImpl : public AbiCustomRegistry {
|
|||
bool can_alias_first_input,
|
||||
bool supports_graph,
|
||||
const uint32_t* required_input_count_for_graph = nullptr,
|
||||
bool supports_64bit_directly = false,
|
||||
bool allows_64bit_via_strides = false,
|
||||
bool allows_64bit_via_strides_from_any_ep = false,
|
||||
bool supports_64bit_tensors_via_emulation = false,
|
||||
_In_reads_(constant_cpu_input_count) const uint32_t* required_constant_cpu_inputs = nullptr,
|
||||
uint32_t constant_cpu_input_count = 0) const noexcept override;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue