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alinx_axau15/PCIe: Switch to Gen3/128-bit for now (configuration used on others Ultrascale+ Gen3 X4 boards).

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This commit is contained in:
Florent Kermarrec 2023-12-28 19:56:45 +01:00
parent e229d1a0b6
commit 982038508e
1 changed files with 2 additions and 2 deletions
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4
litex_boards/targets/alinx_axau15.py
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@ -83,8 +83,8 @@ class BaseSoC(SoCCore):
# PCIe -------------------------------------------------------------------------------------
if with_pcie:
self.pcie_phy = USPPCIEPHY(platform, platform.request("pcie_x4"),
speed = "gen4",
data_width = 256,
speed = "gen3",
data_width = 128,
bar0_size = 0x20000)
self.add_pcie(phy=self.pcie_phy, ndmas=1)