From 3814beeafeb05b485f5a393fa28e70eab6b820d3 Mon Sep 17 00:00:00 2001 From: Henry de Valence Date: Fri, 1 Dec 2017 13:59:40 -0800 Subject: [PATCH] Fix typo and add note on AVX512VL --- src/backend/avx2/mod.rs | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/backend/avx2/mod.rs b/src/backend/avx2/mod.rs index 6fcdb1c..8d48321 100644 --- a/src/backend/avx2/mod.rs +++ b/src/backend/avx2/mod.rs @@ -180,7 +180,7 @@ //! S\_{12} &\gets S\_9 - S\_8 \\\\ //! S\_{13} &\gets S\_9 + S\_8 \\\\ //! S\_{14} &\gets S\_{10} - S\_{11} \\\\ -//! S\_{15} &\gets S\_{10} - S\_{11} +//! S\_{15} &\gets S\_{10} + S\_{11} //! \end{aligned} //! $$ //! @@ -312,6 +312,20 @@ //! intrinsics, and the code is not yet cleanly factored between the //! field element parts and the point parts. //! +//! When compiling with AVX512VL, LLVM is able to use the extra +//! `ymm16..ymm31` registers to reduce register pressure, and avoid +//! spills during field multiplication. This gives a small but +//! noticeable speedup. +//! +//! The addition and subtraction steps involve masking, to apply +//! operations to a single lane of the vector. AVX512VL extends the +//! predication features of AVX512 to AVX2 code and would probably be +//! beneficial. Unfortunately, LLVM is currently unable to lower `op + +//! blend` into an AVX512VL masked operation. However, the explicitly +//! masked versions of the intrinsics seem to produce the same LLVM IR +//! as an `op + blend`, so hopefully this will improve as the AVX512 +//! support in LLVM improves. +//! //! [sandy2x]: https://eprint.iacr.org/2015/943.pdf //! [avx2trac]: https://trac.torproject.org/projects/tor/ticket/8897#comment:28 //! [hwcd08]: https://www.iacr.org/archive/asiacrypt2008/53500329/53500329.pdf