QuantumLearning/configs/mastery_blueprint.toml

title = "QuantumLearning Mastery Blueprint"
terminal_role = "Independent hardware-aware quantum circuit designer"
philosophy = "backward-designed notebook-first apprenticeship"

[[stage]]
order = 0
id = "00-amateur-orientation"
title = "Amateur Orientation"
identity = "You are new enough that you cannot yet decompose circuit-design skill into subskills."
anchor_notebook = "notebooks/START_HERE.ipynb"
must_master = [
  "Understand the one official route through the course",
  "See how mandatory and facultative cells differ",
  "Accept that progress is judged by design ability, not notebook completion",
]
deliverables = [
  "Written statement of the mainline route",
  "Written statement of the professional target",
]
gate = "Explain the official walkthrough, the label system, and the end-state the course is targeting."

[[stage]]
order = 1
id = "01-circuit-literacy"
title = "Circuit Literate Builder"
identity = "You can read, write, draw, and execute simple circuits without conceptual panic."
anchor_notebook = "notebooks/foundations/module_01_principles_and_circuit_literacy/lecture.ipynb"
must_master = [
  "Quantum and classical registers",
  "Single- and two-qubit gates",
  "Measurement wiring and circuit drawing",
]
deliverables = [
  "Annotated Bell and GHZ circuits",
  "Short notebook explaining each gate's role in a circuit",
]
gate = "Build and explain small circuits from scratch without copying line by line."

[[stage]]
order = 2
id = "02-state-and-measurement-reasoning"
title = "State and Measurement Thinker"
identity = "You can predict amplitudes, probabilities, basis dependence, and simple observables."
anchor_notebook = "notebooks/foundations/module_02_qubit_and_statevector_intuition/lecture.ipynb"
must_master = [
  "Statevector intuition",
  "Basis changes before measurement",
  "Counts versus probabilities",
]
deliverables = [
  "Measurement-prediction notebook",
  "Short proofs or explanations for expected distributions",
]
gate = "Predict the output distribution of small circuits before executing them."

[[stage]]
order = 3
id = "03-composable-circuit-designer"
title = "Composable Circuit Designer"
identity = "You stop thinking in isolated gates and start thinking in reusable circuit blocks."
anchor_notebook = "notebooks/qiskit_engineering/module_01_circuit_construction_and_analysis/lecture.ipynb"
must_master = [
  "Reusable subcircuits",
  "Entanglement patterns",
  "Parameterized circuit templates",
]
deliverables = [
  "Small circuit-block library",
  "Notebook comparing multiple design patterns for the same task",
]
gate = "Build the same behavior with at least two reusable circuit constructions and justify the better abstraction."

[[stage]]
order = 4
id = "04-algorithmic-block-engineer"
title = "Algorithmic Block Engineer"
identity = "You can express reversible logic, simple arithmetic blocks, and small oracles as circuits."
anchor_notebook = "notebooks/algorithms/module_01_deutsch_family/lecture.ipynb"
must_master = [
  "Controlled logic",
  "Ancilla management",
  "Oracles and reversible structure",
]
deliverables = [
  "Oracle notebook with truth-table reasoning",
  "Small reversible subroutine with verification checks",
]
gate = "Translate a structured logical rule into a correct circuit rather than searching for a canned example."

[[stage]]
order = 5
id = "05-synthesis-and-parametric-design"
title = "Synthesis Engineer"
identity = "You can derive or decompose circuits from structure, symmetries, and resource constraints."
anchor_notebook = "notebooks/algorithms/module_03_qft/lecture.ipynb"
must_master = [
  "Gate decomposition and synthesis",
  "Parameterized ansatz design",
  "Tradeoffs between depth, width, and clarity",
]
deliverables = [
  "Decomposition notebook with before/after comparisons",
  "Parameterized circuit family with explicit design rationale",
]
gate = "Given a target operation or pattern, derive a circuit family and defend the decomposition choices."

[[stage]]
order = 6
id = "06-hardware-aware-optimizer"
title = "Hardware-Aware Optimizer"
identity = "You can redesign circuits for basis-gate, topology, and routing constraints."
anchor_notebook = "notebooks/professional/module_02_hardware_aware_redesign/lecture.ipynb"
must_master = [
  "Basis gates and coupling maps",
  "Layout effects on depth inflation",
  "Transpilation-aware redesign",
]
deliverables = [
  "Routing pressure case study",
  "Benchmark of alternative layouts or circuit rewrites",
]
gate = "Take an abstract circuit and produce a hardware-aware alternative with justified tradeoffs."

[[stage]]
order = 7
id = "07-noise-aware-experimentalist"
title = "Noise-Aware Experimentalist"
identity = "You can reason about distortion, robustness, and why ideal behavior fails in practice."
anchor_notebook = "notebooks/professional/module_03_noise_aware_verification/lecture.ipynb"
must_master = [
  "Ideal versus noisy behavior",
  "Sensitivity to gate and readout error",
  "Design changes that improve robustness",
]
deliverables = [
  "Noise-debugging notebook",
  "Short report on robustness versus elegance tradeoffs",
]
gate = "Explain not only that a circuit fails under noise, but why and how the design can be changed."

[[stage]]
order = 8
id = "08-verifier-and-reviewer"
title = "Verifier and Reviewer"
identity = "You can test, falsify, debug, and review circuits systematically."
anchor_notebook = "notebooks/professional/module_03_noise_aware_verification/lecture.ipynb"
must_master = [
  "Verification invariants",
  "Cross-checking ideal and empirical behavior",
  "Design review language and benchmarking discipline",
]
deliverables = [
  "Circuit review memo",
  "Verification harness for a nontrivial design",
]
gate = "Find hidden defects in a plausible-looking circuit and prove why they are defects."

[[stage]]
order = 9
id = "09-capstone-designer"
title = "Capstone Circuit Designer"
identity = "You can independently design, benchmark, review, and defend full circuit solutions."
anchor_notebook = "notebooks/professional/module_04_capstone_design_review/lecture.ipynb"
must_master = [
  "End-to-end circuit architecture",
  "Alternative design benchmarking",
  "Professional design justification",
]
deliverables = [
  "Capstone notebook",
  "Written design review with metrics, risks, and tradeoffs",
]
gate = "Given a fresh problem, produce multiple candidate circuits, benchmark them, choose one, and defend the decision professionally."